The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 1999

Filed:

Dec. 01, 1994
Applicant:
Inventors:

Marco Corsi, Dallas, TX (US);

Nicolas Salamina, Dallas, TX (US);

Jeffrey W Sanders, Plano, TX (US);

Michael R Kay, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323273 ; 323280 ;
Abstract

A voltage regulator circuit (10) is provided. Regulator circuit (10) includes an amplifier (18) with an emitter follower output stage (26). Emitter follower stage (26) is coupled to a gate of a PMOS transistor (28). The source of transistor (28) is coupled to an input voltage at a power supply rail (12). Regulator (10) provides an output at node (14) at a drain of transistor (28). The output at node (14) is divided by resistors (30 and 34) and provided in a negative feedback loop to an input of amplifier (18). A reference voltage (22) is also provided to a second input of amplifier (18) such that the output at node (14) is a regulated voltage.


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