Method and apparatus for managing snoop requests using snoop advisory

Abstract

A plurality of 'snoop advisory' bits are maintained by snoop management circuitry externally to the processor structure. Each snoop advisory bit corresponds to a respective 'snoop advisory page' of the memory address space. Three parallel processes take place with respect to these bits. First, in response to each read access by the processor structure, if the read access is of a predetermined type (such as a cache line fill operation with intent to modify), snoop management circuitry writes a 'snoop yes' value into the snoop advisory cell corresponding to the snoop advisory page which includes the address of the processor's access. Second, in response to each access by another device which shares the address space with the processor structure, a snoop request is issued to the processor structure, but only if the snoop advisory cell corresponding to the snoop advisory page which includes the address of the device's access, contains the 'snoop yes' value. Otherwise, the device is allowed to perform its access directly to the memory structure without issuing a snoop request. Third, on a recurrent basis, the processor internal cache is synchronized with the memory structure and the system writes a 'snoop no' value into each of the snoop advisory bits to clear them. Synchronization can involve performing a write-back on each cache line which is in a modified state, and/or invalidating each line in the cache.