Dmos process module applicable to an e.sup.2 cmos core process

Abstract

In a method of fabricating a DMOS transistor structure, wherein the DMOS transistor structure includes an active semiconductor substrate region having a tub of N-type conductivity formed therein, the N-type tub being formed over an N.sup.+ buried region, and having an N.sup.+ sinker region formed therein at an edge of the N-type tub, the N.sup.+ sinker region extending from a surface of the N-type tub to the N.sup.+ buried region, a pad oxide layer is formed on the N-tub and on the N.sup.+ sinker region. A composite mask is then formed on the silicon nitride layer, and includes etched openings such that the surface of the periphery of the N-type tub is exposed and the interface between the N-type tub and the N.sup.+ sinker region is exposed. The composite mask is then utilized to form field oxide isolation regions in the semiconductor substrate region at the periphery of the N-type tub and at the interface between the N-type tub and the N.sup.+ sinker region. After removing the composite mask, a P-body mask is formed on the nitride layer. Finally, a metal layer is formed over the structure resulting from the above-defined steps to form metal contacts to the P-body region, the gate contact and the N.sup.+ sinker region.