The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 1998

Filed:

Aug. 21, 1996
Applicant:
Inventors:

Mehran Matloubian, Encino, CA (US);

Jeffrey B Shealy, Thousand Oaks, CA (US);

Assignee:

Hughes Electronics Corporation, El Segundo, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; G01R / ;
U.S. Cl.
CPC ...
438 18 ; 438571 ; 438577 ;
Abstract

An apparatus and method of processing a planar HEMT or FET semiconductor device is disclosed. An ohmic metalization is patterned on a semiconductor surface then lifted-off. A plurality of process control monitors are isolated, preferably using a wet etch process. The process control monitors preferably include transmission line patterns (TLMs) and etch field effect transistors The TLMs measure the contact resistance during the ohmic alloy process, and the etch field effect transistors monitor the drain current during the gate-recess step. The ohmic metalizations are then alloyed, and a gate is written using an electron beam. The semiconductor device is isolated, followed by application of an overlay which connects all resulting planar device connecting pads.


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