The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 1998

Filed:

Oct. 08, 1997
Applicant:
Inventors:

Ching-Nan Yang, Chutung Chen, TW;

Li-Chun Peng, Chung Ho, TW;

Assignee:

Mosel Vitelic Inc., Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365154 ; 365148 ; 365161 ;
Abstract

An SRAM cell formed on a semiconductor substrate with low standby current is disclosed. The memory cell includes a first inverter, a second inverter cross-coupled to the first inverter to form a storage element, a first load device coupled to the first inverter, a second load device coupled to the second inverter, a first access transistor coupled to an output port of the first inverter, and a second access transistor coupled to an output port of the second inverter. In this memory cell, the first load device is placed over the second inverter with substantial overlapping therebetween, so that resistance of the first load device increases when an input of the second inverter is at a low potential, thereby decreasing a standby current of the first load device. Similarly, the resistance of the second load device increases when an input of the first inverter is at a low potential.


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