The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 1998

Filed:

May. 27, 1997
Applicant:
Inventors:

Neal Glover, Broomfield, CO (US);

Howard H Sheerin, Denver, CO (US);

Assignee:

Cirrus Logic, Inc., Fremont, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
360 51 ; 360 48 ;
Abstract

In a disc storage system employing multiple recording heads to increase throughput by providing simultaneous access through multiple data streams, a sampled amplitude read channel is disclosed for detecting, in parallel, estimated data sequences from the read signals associated with each data stream. Timing recovery in the read channel is implemented through interpolation, that is, by asynchronously sampling the analog read signals and interpolating to synchronous sample values. In this manner, a frequency synthesizer can generate a single reference clock for clocking operation of all the discrete time circuitry, thereby eliminating noise caused by multiple clocks as well as simplifying diagnostics. Furthermore, interpolated timing recovery avoids noise due to cross-talk between voltage controlled oscillators (VCOs) that would likely occur in a conventional synchronous sampling timing recovery design. A significant advantage is that the read channel can reside in a single integrated circuit.


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