The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 22, 1998
Filed:
Aug. 28, 1997
Dipankar Pramanik, Saratoga, CA (US);
Kouros Ghandehari, Fremont, CA (US);
Satyendra S Sethi, Pleasanton, CA (US);
Daniel C Baker, Milpitas, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
The present invention is directed to a method and apparatus for detecting edges through one or more opaque, planarized layers of material. Exemplary embodiments can take full advantage of decreased size geometries associated, such as 0.25 micron technologies, without suffering inaccuracies due to wafer misalignment during processing (e.g., during a photolithographic process). The invention is applicable to any process where an edge is to be detected through a planarized layer which is opaque to visible light. In an exemplary embodiment, an edge of an alignment mark can be detected using an energy source having a wavelength and angle of incidence specifically selected with respect to the optical characteristics and thickness of particular material layers being processed. According to exemplary embodiments, the wavelength of the energy source selected, such as an infrared light source, can be determined on the basis of an absorption coefficient of the planarized opaque material through which edge detection is to be performed (e.g., through a planarized polysilicon layer), and on the basis of a predetermined thickness with which the planarized polysilicon layer is formed.