The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 22, 1998
Filed:
Dec. 10, 1996
Applicant:
Inventors:
Chan-Jen Kuo, Tainan, TW;
Fu-Liang Yang, Tainan, TW;
Assignee:
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438253 ; 438250 ;
Abstract
A planarzation process is crucial for submicron VLSI or ULSI fabrication, The method of the present invention comprises forming a stacked capacitor contact on a substrate, forming a first dielectric layer on the capacitor contact. Next an etching process is performed to etchback the first dielectric layer. Finally, a second dielectric layer is formed on the first dielectric layer. A thermal reflowing may be also used to increase the planarization.