The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 1998

Filed:

Dec. 19, 1995
Applicant:
Inventors:

Qadeer A Qureshi, Round Rock, TX (US);

Joseph A Bailey, Austin, TX (US);

Dan S Mudgett, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395733 ; 395734 ; 395735 ; 395736 ; 395737 ; 395738 ; 395739 ; 395740 ; 395741 ; 395742 ; 395868 ; 395869 ; 395870 ; 395871 ;
Abstract

A programmable interrupt controller for use in computer systems including one or more CPUs is provided. The programmable interrupt controller includes an interrupt request interface, a validity checker, and at least one processor interface. The validity checker monitors the state of each interrupt request as it is processed through the interrupt controller. The interrupt request is canceled if the interrupt request becomes invalid. Alternatively, the programmable interrupt controller issues a spurious interrupt vector if the interrupt request becomes invalid after a CPU has responded.


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Qureshi, Qadeer. (1998). System and method for validating interrupts before presentation to a cpu (U.S. Patent No. 5850555). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5850555

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