The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 1998
Filed:
May. 22, 1997
Colin Harris, New Westminister, CA;
Curtis B Lapadat, Burnaby, CA;
PMC-Sierra Ltd., Burnaby, CA;
Abstract
A tri-state output driver comprised of a pair of complementary field effect transistors (CMOS FETs) having sources and drains connected in a series circuit between a voltage rail and ground, apparatus for applying similar logic high and low input signals to respective gates of the FETs whereby an output terminal connected in a circuit between the sources and drains of the FETs is driven toward ground or the voltage rail respectively, or opposite polarity input signals to the gates for causing the FETs to assume a high impedance, and apparatus for maintaining a voltage across the source and drain of the FET which is connected in a circuit between the voltage rail and the output terminal, at less than a lower of an FET threshold of conduction voltage or diode turn-on voltage greater than the voltage of the voltage rail, during the high impedance state, so as to maintain the latter FET in a high impedance state even when a voltage at the output terminal is equal to a voltage which is higher than an FET threshold of conduction or diode turn-on voltage greater than the voltage of the voltage rail.