The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 1998

Filed:

Dec. 02, 1996
Applicant:
Inventors:

Kyuichi Takimoto, Kasugai, JP;

Takashi Matsumoto, Kasugai, JP;

Yoshiaki Sano, Kasugai, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J / ; H02J / ;
U.S. Cl.
CPC ...
320164 ; 320162 ; 320163 ; 320140 ; 320145 ; 323275 ; 323276 ; 323277 ;
Abstract

A charging apparatus having a power supply circuit that provides a DC output current via a sense resistor. A current detector amplifies, detects and provides a voltage across the sense resistor. A controller designates the output of the current detector as a determination signal when the DC output current is equal to a preset voltage. Responsive to the determination signal, the controller generates a control signal in order to control the DC output current of the power supply circuit. More particularly, the current detector includes a first differential amplifier that amplifies and output the voltage across the sense resistor, a second differential amplifier amplifies and supplies a differential voltage between the output of the first differential amplifier and a predetermined first reference voltage, and a first output circuit responsive to the output of the second differential amplifier delivers the determination signal. The second differential amplifier includes a first clamp circuit provided between the first differential amplifier and the first output circuit to clamp the input to the second differential amplifier.


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