The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 1998

Filed:

Aug. 12, 1996
Applicant:
Inventors:

Hiroshi Kikuchi, Tokyo, JP;

Tetsuya Hayashida, Tokyo, JP;

Masakatsu Gotou, Atsugi, JP;

Assignees:

Hitachi, Ltd., Tokyo, JP;

Hitachi Hokkai, Hokkaido, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
438108 ; 438118 ; 438126 ; 438127 ; 438613 ;
Abstract

A semiconductor device has a pellet at the upper surface of a substrate and connects the pellet with a plurality of connecting terminals formed of solder bumps. The connecting terminal group is arranged in the form of a plurality of annular lines in the periphery of the pellet, and a reinforcing resin layer is formed, in the connecting terminal group, of a resin filling a thinner space formed between the pellet and the substrate. At the time of forming the solder bumps, a cutout portion (a vacant area where no bumps are arranged) is formed in the connecting terminal annular line group by means of a cutout part opened at one side of the annular line group, and the reinforcing resin layer is also formed in the cutout portion. Since the air in the thinner space is perfectly exhausted by the effect of the connecting terminal annular line group cutout portion when the vacant area is filled with the reinforcing resin, the generation of an unfilled area in the reinforcing resin layer can be prevented.


Find Patent Forward Citations

Loading…