The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 1998

Filed:

Nov. 05, 1996
Applicant:
Inventors:

Robert Henry Granau, Phoenix, AZ (US);

Steven David Willis, Scottsdale, AZ (US);

Mark David Summers, Phoenix, AZ (US);

Craig Bayman McIntosh, Arlington Heights, IL (US);

Assignee:

Motorola, Inc., Schamuburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395309 ; 395308 ; 370402 ;
Abstract

A gateway controller (100) for facilitating the exchange of information between PCI busses (101,103). The controller (100) may comprise a single printed wiring board (301) or two printed wiring boards (201,203) connected by cable (205). Busses (101, 103) are physically isolated from one another for security or other reasons. This technique provides for controlled communication capability which does not require direct linking of two subsystem buses. This technique also provides for a method of transparent communication between subsystems. This gateway controller (100) allows data control while providing bus security and physical isolation of communication buses.


Find Patent Forward Citations

Granau, Robert. (1998). Peripheral component interconnect gateway controller (U.S. Patent No. 5848252). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5848252

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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