The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 1998
Filed:
Jul. 03, 1997
Kensuke Fujimoto, Kanagawa, JP;
Sony Corporation, Tokyo, JP;
Abstract
An A/D converter supplies an interpolation circuit with sampled values which are obtained by sampling a playback signal coming from a read-out device in synchronization with a system clock signal. In the interpolation circuit, the value of the playback signal at the time the phase of a PLL clock phase signal P supplied by a PLL clockphase signal generator becomes zero is computed from the sampled values by using a linear interpolation technique. The interpolation value is then supplied to a binary conversion circuit and fed back to a phase error detecting circuit. The binary conversion circuit converts the interpolation value of the playback signal into a binary value which is then supplied to a circuit at the following stage. The phase error detecting circuit detects a zero cross of the interpolation value of the playback signal. The zero cross timing is then used for computing a phase error signal which is then output to the PLL clock phase signal generator by way of a loop filter. The PLL clock phase signal generator generates the PLL clock phase signal P which is supplied to the interpolation circuit as described above.