The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 1998

Filed:

Dec. 31, 1997
Applicant:
Inventor:

Jin-seok Kwak, Kyungki-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365201 ; 36518902 ; 36518907 ;
Abstract

An integrated circuit having a wide internal data path, such as a Merged Memory and Logic (MML) integrated circuit, is tested by serially comparing data on one of the data paths to data on selected others of the data paths. A first indication is provided if the serially compared data on the one of the data paths and on the selected others of the data paths are all a first logic value. A second indication is provided if the serially compared data on the one of the data paths and on the selected others of the data paths are all a second logic value. A third indication is provided if the serially compared data on the one of the data paths and on the selected others of the data paths are of differing logic values. By serially comparing data on one of the data paths to data on selected others of the data paths, a reduced number of comparators may be provided. Efficient circuits and methods for testing integrated circuits, such as memory integrated circuits or logic integrated circuits, may thereby be provided.


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