The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 1998
Filed:
Feb. 07, 1992
Samuel Dale Pritchett, Flower Mound, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A discrete increment attenuator for processing an input signal by effecting discrete attenuation increments of the input signal to create corresponding attenuation states for the output signal resulting from the input signal, comprising a parallel branched attenuator network providing at least three attenuation states defining corresponding attenuation increments, coupled to receive the input signal and provide the output signal. A separate attenuation branch circuit having an input end and an output end corresponding to a particular plural parallel branch is selectively activated by an attenuation control signal for effecting a discrete incremental attenuation of the input signal. Control circuitry for each attenuation branch circuit is responsive to an attenuation control signal for selectively activating the associated attenuation branch circuit to effect the incremental attenuation including two active control elements, one on each end of each attenuation branch circuit, the attenuation state control signal biasing the active control elements one of both on to activate the branch circuit and effect the corresponding attenuation or both off to deactivate the branch circuit. Each attenuation branch circuit has two ends, a resistive T-network coupled between the two ends and an RF path which blocks DC bias voltages from the T-network to a source of reference voltage. A bias-off offset circuit is coupled to the input for providing an offset biasing level to the respective two control elements for each inactive branch circuit to inhibit those circuits from activating in response to extraneous signals.