The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 1998

Filed:

May. 03, 1996
Applicant:
Inventors:

Srinivasa R Malladi, San Jose, CA (US);

Mahadev S Kolluru, Santa Clara, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G10L / ;
U.S. Cl.
CPC ...
704270 ; 704778 ;
Abstract

A reusable hardware layout ('core') for performing some, but not all, MPEG and AC-3 audio decoding functions. Specifically, the audio core performs matrixing and windowing operations of MPEG and AC-3 decoding. The disclosed audio core design includes a data path, a control logic unit, an input RAM interface (for controlling an input RAM), an output RAM interface (for controlling an output RAM), a ROM, a ROM addressing logic unit, and a registers interface. The input RAM and the output RAM are located outside of the audio core. The control logic unit specifies in which state of multiple states the audio core currently resides, with each of the multiple states specifying one function or group of functions of either the MPEG or AC-3 decoding process. The control logic unit includes an MPEG state machine for generating MPEG state and cycle count information and an AC-3 state machine for generating AC-3 state and cycle count information. This information is employed by the RAM and ROM addressing logic to specify appropriate addresses for reading and writing data.


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