The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 1998

Filed:

Aug. 26, 1996
Applicant:
Inventors:

Gabriel Roland Munguia, Phoenix, AZ (US);

Peter Chambers, Scottsdale, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395293 ; 395296 ; 395303 ; 395728 ; 395732 ;
Abstract

A system and method for determining which of plurality of peripheral components will have access to a peripheral component interconnect (PCI) bus when none of the plurality of peripheral components is currently requesting access to the PCI bus. In one embodiment a history buffer records all requests by a plurality of peripheral components for access to the PCI bus. The present invention then determines which of the plurality of peripheral components requests access to the PCI bus most often. Next, the present invention grants the peripheral component which requests access to the PCI bus most often access to the PCI bus when no other peripheral component is requesting access to the PCI bus. In so doing, the present invention 'parks' the PCI bus on the peripheral component which has, in the past, requested access to the PCI bus most often.


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