The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 1998

Filed:

May. 02, 1996
Applicant:
Inventors:

Richard Alan Vrba, Austin, TX (US);

James Stevens Klecka, Austin, TX (US);

Kyran Wilfred Fey, Jr, Pflugerville, TX (US);

Larry Leonard Lamano, Austin, TX (US);

Nikhil A Mehta, Austin, TX (US);

Assignee:

Tandem Computers, Incorporated, Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
3951821 ; 39520078 ; 395553 ; 375356 ;
Abstract

A fault-tolerant computer system employing multiple CPUs executing the same instruction stream under independent clock cycle timing. The CPUs deterministically execute the instructions internally until input or output operations require access to memory or devices which are not synchronous with the local CPU clock. The CPUs are forced to take the same number of CPU clock cycles to complete the I/O operations. When the I/O operation is complete the internal processing of the instruction stream continues in a manner which is clock aligned in each of the multiple CPUs but which may be separate in real time due to oscillator drift. Accumulated drift is periodically removed by a timed interrupt which forces resynchronization of the CPUs in real time.


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