The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 1998
Filed:
Dec. 02, 1996
Applicant:
Inventor:
Fung Fung Lee, Milpitas, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36123001 ; 36523003 ;
Abstract
A programmable logic array integrated circuit device having a memory array in which data can be accessed in either a transposed or nontransposed mode. The memory array has multiple rows and columns of memory cells. Each row of cells can be viewed as a matrix made up of virtual rows and virtual columns. Data in a given row of the memory array can be accessed using nontransposed data words that contain data bits corresponding to cells in the virtual rows. Data in the given row can also be accessed using transposed data words that contain data bits corresponding to cells in the virtual columns.