The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 1998

Filed:

Aug. 06, 1997
Applicant:
Inventors:

Hiroki Fujimura, Tokyo, JP;

Takashi Miyamora, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
36471508 ;
Abstract

A shift circuit consists of a sequence of a first stage shifter for receiving 32-bit input data, a second stage shifter, and a third stage shifter. The first stage shifter shifts the input data in a higher or lower direction by any one of 0 to 7 bits and provides the second stage shifter with a shifted 32-bit result. Each of the second and third stage shifters receives a shifted 32-bit result from the preceding stage shifter and shifts each byte of the shifted result independently in the higher or lower direction by 8 or 16 bits. The second and third stage shifters consist each of selectors that receive control signals, respectively, to realize various shifting operations on the input data, thereby providing a variety of data operations.


Find Patent Forward Citations

Fujimura, Hiroki. (1998). Shift circuit and system having the same (U.S. Patent No. 5844828). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5844828

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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