The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 1998

Filed:

Aug. 03, 1993
Applicant:
Inventors:

Mario Enrique Ecker, Poughkeepsie, NY (US);

Lawrence Jacobowitz, Poughkeepsie, NY (US);

Casimer Maurice DeCusatis, Lake Katrine, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R / ;
U.S. Cl.
CPC ...
439329 ; 29825 ; 333260 ; 439347 ;
Abstract

A pluggable connector capable of connecting a large number of electrical transmission lines per connector, and small enough to enable a large number of connectors to be added to a multi-chip module. For example, 5 or 6 of these connectors can add over a hundred coaxial cables to a module. Improved I/O communications is added to a module by such coaxial cables, since they can communicate very high frequency signals in noise prone environments. The pluggable connector is embedded in a multilayer module (e.g. ceramic or glass) for conveying digital information to transmission lines internal or printed on the surface of a module. Each connector contains a receptacle 19 having a silicon contact structure embedded in an edge of a multi-chip module. The contact structure is formed with a plug-receiving angle for deflecting multiple cantilevered plug contacts 17 into engagement with corresponding receptacle contacts 22. The silicon connector parts 19 have a thermal coefficient of expansion which matches that of silicon semiconductor and glass ceramic module 4 to maintain alignment over large temperature variations.


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