Atm network switch with congestion level signaling for controlling cell

Abstract

An ATM network switch is provided with a switch fabric linking a plurality of slot controllers. Each slot controller receives ATM cells from an external data link and has at least one input port to the switch fabric. The switch fabric switches a data cell received from any one port to one or more other ports. Each slot controller is provided with a separate group of buffers for each slot controller in the switch, and stores ATM cells intended for those other slot controller in the buffers. Each group of buffers includes a separate buffer for each class of cell traffic, so that the ATM cells are stored by intended slot controller and by class. The slot controller also includes a buffer control circuit which controls the passing of cells from the buffer to the switch fabric. The switch fabric includes input FIFOs, an indication of the fullness of which is measured and signaled back to the buffer control circuit. In response to the feedback signal which is an indication of the congestion level of each switching path through the switch fabric from one port thereto to another, the buffer control circuit controls the output of cells from the slot controller buffers to the switch.