The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 1998
Filed:
Apr. 22, 1997
Richard G Cliff, Milpitas, CA (US);
L Todd Cope, San Jose, CA (US);
Cameron R Mc Clintock, Mountain View, CA (US);
William Leong, San Francisco, CA (US);
James A Watson, Santa Clara, CA (US);
Joseph Huang, San Jose, CA (US);
Bahram Ahanin, Cupertino, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ('LABs'). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.