The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 1998

Filed:

Sep. 11, 1996
Applicant:
Inventors:

Ronald L Feiller, Whitehall, PA (US);

Hon Shing Lau, Allentown, PA (US);

Le Tieu Ly, Allentown, PA (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364788 ;
Abstract

An integrated circuit having a fast carry generation adder for adding together two input signals has an initial stage and two or more intermediate stages. The adder may also include a final stage. Each intermediate stage has a carry mux and these carry muxes are grouped together, for example, adjacent to the initial stage and adjacent to the first intermediate stage. By grouping the carry muxes together, for example, in a column below the initial stage, the fast carry generation adder may be both faster and smaller than conventional adders and may reduce or even eliminate the need for any buffering between successive carry muxes.


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