The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 1998

Filed:

Jun. 20, 1996
Applicant:
Inventor:

Chakra R Srivatsa, San Jose, CA (US);

Assignee:

Sun Microsystems, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364489 ; 364491 ;
Abstract

A method includes operating a general purpose computer system to minimize signal-propagation delay time of a long line of a simulated circuit. A design engineer empirically derives two rule bases, the first of which determines whether to divide the long line into two or more segments by inserting repeater amplifiers into a long line to minimize the propagation delay through the line. The second rule base relates optimum amplifier size for driving long lines to line length. These rule bases are stored in a main memory of the computer system. The computer system is configured to apply the first rule base to the long line to determine whether to divide the long line into two or more segments by inserting repeater amplifiers, and to apply the second rule base to optimize the size of each of the repeater amplifiers. The resulting long line, segmented by size-optimized repeater amplifiers, provides minimal signal-propagation delay.


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