The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 1998

Filed:

Jul. 07, 1995
Applicant:
Inventor:

Steve T Cho, Newport Beach, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
438 51 ; 438 88 ; 438118 ; 438125 ; 438456 ; 438466 ; 438611 ; 438654 ; 438656 ; 438661 ;
Abstract

A process for manufacturing a vacuum enclosure for a semiconductor device formed on a substrate with leads extending peripherally. Assembly of the enclosure is compatible with known batch fabrication techniques and is carried out at pressures required for optimal device operation. In a first embodiment, an intrinsic silicon shell is sealed to the substrate via electrostatic or anodic bonding with the leads diffusing into the shell. In a second embodiment, a thin interface layer of silicon or polysilicon is deposited on the substrate prior to electrostatic bonding a glass shell thereon. In a third embodiment, tunnels are formed between a lower peripheral edge of the shell and the substrate, allowing leads to pass thereunder. The tunnels are sealed by a dielectric material applied over the enclosure.


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