The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1998

Filed:

Sep. 11, 1995
Applicant:
Inventors:

Eiichi Nagai, Kawasaki, JP;

Yoshihiro Takemae, Kawasaki, JP;

Hirohiko Mochizuki, Kawasaki, JP;

Yukihiro Nomura, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395881 ; 395551 ;
Abstract

A data transfer apparatus is disclosed which has a first, a second, and a third pipeline processing circuits disposed in cascade connection. The first and the second pipeline processing circuits are each provided with an arbitrary signal processing circuit, a switch element for controlling the introduction of data into the signal processing circuit, and a switch control circuit for turning on the switch element on detecting completion of the transfer of data from the signal processing circuit to a pipeline processing circuit in the subsequent stage. The third pipeline processing circuit is provided with an output circuit and a switch element for introducing data transferred from the second pipeline processing circuit into the output circuit as synchronized with an external clock signal. Between the first and the second pipeline processing circuit, therefore, data can be transferred with a timing conforming to the timing of the operation of the signal processing circuit without being synchronized with an external clock signal. In the output circuit, data can be issued as synchronized with an external clock signal. Thus, a signal of a very high frequency can be selected as a clock signal for setting the timing of the whole of a system incorporating the data transfer apparatus therein.


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