The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 1998
Filed:
Jul. 08, 1997
Kenneth S Barron, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method for setting the state of a clock-driven pseudo-noise sequence generator ('PNSG') having N stages, after the clock has been inhibited for a predetermined number K of clock cycles, to the state S.sub.2 (D) the PNSG would have been had the clock not been inhibited, based on the state S.sub.1 (D) the PNSG is in at the time inhibition of the clock is commenced. The method involves performing the following steps. First, a previously determined value, a(D)=the remainder of D.sup.Kq /f(D), is stored, wherein D is the delay transform operator, q=2.sup.N -2, and f(D)=c.sub.1 D.sup.N +c.sub.2 D.sup.N-1 + . . . +c.sub.N D+1. The product S.sub.2 (D)=a(D)S.sub.1 (D) is formed, wherein S.sub.1 (D)=s.sub.11 D.sup.N-1 +s.sub.12 D.sup.N-2 + . . . +s.sub.1N D.sup.0. If the degree of S.sub.2 (D) does not exceed N-1, the state bit values for S.sub.2 (D) are inferred from the product. However, if the degree of S.sub.2 (D) exceeds N-1, the product S.sub.2 (D) is first reduced by f(D), and then the state bit values for S.sub.2 (D) are inferred from the product.