The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1998

Filed:

Dec. 05, 1996
Applicant:
Inventors:

Gary W Green, Pleasanton, CA (US);

John Q Torode, Hunts Point, WA (US);

T J Rodgers, Woodside, CA (US);

Shailesh Shah, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365149 ; 365222 ;
Abstract

A method and circuit for hiding a refresh of DRAM cells in a memory device. One embodiment of the circuit includes a selection circuit configured to select a first row of DRAM cells in the memory circuit in response to an active control signal. As a result, data may be read from or written to at least one of the DRAM cells in the first row. The selection circuit is also configured to couple a refresh address to a second row of DRAM cells in the memory circuit in response to an inactive state control signal. The second row of cells is refreshed when the selection circuit accesses the second row. For one embodiment, the DRAM cells are four transistor DRAM cells.


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