The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 1998
Filed:
Jan. 19, 1996
Chi Ouyang, Fremont, CA (US);
Robert P Gardyne, Oakland, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A conversion system for converting run-level pairs into variable length codes (VLCs) for purposes of compression, where each run-level pair includes a run and level value derived from scanning blocks of DCT coefficients. Each run value is provided to a programmable memory, which stores a segment address table comprising a list of base addresses, where a base address is included for each valid run value. An adder is provided for adding the base address to the level value of the run-level pair for determining a VLC address. The VLC address is provided to another programmable memory, which stores a table of VLCs, where the VLCs are grouped according to corresponding run values into a plurality of run segments, where each run segment corresponds to one run value and where each group of VLCs are ordered according to level values. The VLCs are preferably organized in ascending order based on the level values. The segment address table preferably includes a corresponding end address for each base address, where the end address is compared with the VLC address for determining an out-of-bounds VLC address. In the event an out-of-bounds value occurs, an escape signal is asserted for instructing the encoding system to use an escape code followed by a fixed length code for each out-of-bounds run-level pair. The conversion system is preferably implemented as a digital logic pipeline within an encoding system, which scans blocks of DCT coefficients and provides corresponding VLCs.