The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1998

Filed:

Aug. 29, 1996
Applicant:
Inventors:

Takao Ogasawara, Yokohama, JP;

Tsutomu Uemoto, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
438154 ; 438517 ; 438527 ; 438532 ; 438540 ;
Abstract

The method of manufacturing a thin film transistor, including the steps of: a first step, after a poly-crystal silicon film has been formed on a substrate (1), for forming a layer to be formed as an conductive layer (2a) for the thin film transistor by patterning the formed polycrystal silicon film; a second step for doping impurity ions at the layer to be formed as the conductive layer; a third step for cooling the substrate by a cooling mechanism after the second step; and a fourth step for forming a source region (4a.sub.1) and a drain region (4a.sub.2) in the conductive layer, respectively by repeating the second and third steps. By this method, impurities can be doped at microscopic regions, and further the highest possible throughput can be obtained.


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