The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 1998

Filed:

Nov. 12, 1997
Applicant:
Inventor:

Naoshi Higaki, Kanagawa, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 49 ; 36518902 ; 36523002 ; 711128 ;
Abstract

A method is for manufacturing a cache memory device for writing cache data into and reading cache data from a storing region of a memory cell array designated according to a portion of an address signal and a selection signal from a 1/2 multiplexer. In a first step of the method, a common base of the 1/2 multiplexer applicable to both a direct-map type cache memory device and a set-associative type cache memory device is manufactured. Then, in a second step of the method, one of the direct-map type cache memory device and the set-associative type cache memory device is manufactured using the common base of the 1/2 multiplexer. The 1/2 multiplexer included in the direct-map type cache memory device outputs another portion of the address signal as the selection signal, and the 1/2 multiplexer included in the set-associative type cache memory device selectively outputs one of a write way signal and a read way signal as the selection signal according to a write enable signal.


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