Low voltage digital-to-analog converter

Abstract

A low voltage digital-to-analog converter (DAC) uses a resistor string to divide a supply voltage. The voltage output for the DAC is fixed at an intermediary node in the resistor string, and NMOS and PMOS transistors are used to switch in V.sub.SS and V.sub.DD respectively to nodes in the resistor string such that the NMOS and PMOS transistors are operated where they are most conductive. A decoder is used to decode the digital input to control the switches. One switch from each set of NMOS and PMOS transistors is activated for a given input, or thermometric decoding of the input is used to activate more than one switch from each set to preserve monotonicity. In an alternative embodiment, when matching of the resistors can be assumed, a two-step decoding process is used. An LSB decoder decodes the least significant bits of the digital input and controls how V.sub.DD is applied to a bank of LSB resistors through PMOS transistors, and how V.sub.SS is applied to a second bank of LSB resistors through NMOS transistors. The output from each of these LSB banks lead into to a first MSB bank of resistors and a second bank of MSB resistors, respectively. An MSB decoder decodes the most significant bits of the digital input and controls how the output from the first LSB bank is applied to the first bank of MSB resistors through PMOS transistors, and how the output from the second LSB bank is applied to the second bank of MSB resistors through NMOS transistors. Each MSB resistor is greater than seven LSB resistors in series, and the maximum impedance difference between switches is smaller than an LSB resistor in order to preserve monotonicity of the DAC.