The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 1998
Filed:
Dec. 23, 1996
Applicant:
Inventors:
William G Baker, Starkville, MS (US);
Andrew L Hawkins, Santa Clara, CA (US);
Jeffery Scott Hunt, Ackerman, MS (US);
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523006 ; 3652257 ; 365200 ;
Abstract
The present invention concerns a method and apparatus for disabling columns using a local fuse decoding system. The present invention uses local decoding in order to use a number of fuses that is less than the number of columns in order to disable column failures. This is particularly useful when the fuse pitch is greater than the column pitch which does not allow for a fuse to be implemented in each column.
Baker, William. (1998). Decoder circuit and method for disabling a number of columns or rows in (U.S. Patent No. 5828624). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5828624
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile