The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 1998
Filed:
Sep. 12, 1996
Hung T Nguyen, Santa Clara, CA (US);
Leo Lee, San Jose, CA (US);
Quality Semiconductor, Inc., Santa Clara, CA (US);
Abstract
A mixed-mode, overvoltage tolerant input buffer for interfacing to a tristate bus line is disclosed, the input buffer having a bus hold feature for maintaining the state of the input buffer output and bus line when the bus line enters into the tristate mode, the input buffer being capable of suppressing leakage currents from the bus input through the bus hold circuit to the input buffer power supply during overvoltage conditions. The bus hold circuit has a feedback inverter coupled between the output and the bus input for providing a stabilizing feedback signal to the bus input, the inverter being powered by a source voltage which is selectively coupled to the input buffer power supply, the source voltage being isolated from the input buffer power supply during overvoltage conditions.