The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 1998

Filed:

Sep. 02, 1997
Applicant:
Inventors:

Karl M Fant, Minneapolis, MN (US);

Scott A Brandt, Minneapolis, MN (US);

Assignee:

Theseus Logic, Inc., St. Paul, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326 35 ; 326 59 ;
Abstract

A NULL convention logic element comprises an input, an output and a threshold switching circuit. The input receives NULL convention signals that are encoded onto a plurality of physical input signal lines that can assume at least a first meaningful signal state indicating data, a NULL signal state which has no logic meaning and third signal state distinct from the first and second signal states. The output produces output NULL convention signals that are encoded onto a plurality of physical input signal lines that can assume at least a first meaningful signal state indicating data, a NULL signal state which has no logic meaning and third signal state distinct from the first and second signal states. The threshold switching circuit triggers changes of the output signal state to NULL in response to the states of all the input signals becoming NULL. The threshold switching circuit triggers changes of the output signal state to the meaningful state when the number of the input signals in the meaningful state exceeds a threshold number. The threshold switching circuit triggers changes of the output signal state to the third state when (i) fewer than all input signals are in the NULL state, and (ii) fewer than the threshold number of input signals are in the meaningful state.


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