Readout backside processing for hybridization

Abstract

This invention pertains to a method for processing readout integrated circuits, and to a readout integrated circuit (10) that is processed in accordance with the method. The method includes a first step of providing a plurality of individual readout circuits each having a substrate (12) and at least one layer (14) constructed to have active circuitry that overlies a first surface (12a) of the substrate. Each of the readout integrated circuits has an associated amount of non-flatness or bowing due at least in part to a first force exerted on the substrate by the at least one layer of circuitry. A next step sorts the plurality of readout integrated circuits into a plurality of groups (A, B, C), wherein members of a group have a similar amount of non-flatness. A next step of the method determines, for each group, a thickness of compensating layer (18) and then applies the compensating layer on a second surface (12b) of the substrate so as to exert a second force on the substrate to counteract the first force and to reduce the amount of non-flatness. In a presently preferred embodiment of the invention the step of applying includes a step of sputtering a layer comprised of Si.sub.3 N.sub.4 upon the second surface. The step of sorting includes the steps of operating an interferometer to generate a pattern of fringes for indicating a degree of non-flatness of each of the readout integrated circuits; and counting the fringes and sorting the readout integrated circuits as a function of the number of fringes.