The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 1998

Filed:

May. 13, 1996
Applicant:
Inventors:

Robert Allen Hutchins, Tucson, AZ (US);

Glen Alan Jaquette, Tucson, AZ (US);

Alan Robert Clark, Tucson, AZ (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
369124 ; 369 59 ; 360 46 ;
Abstract

In a first embodiment, a read detection channel includes a tracking threshold circuit for generating a variable threshold signal and a detection circuit, which is configurable in a number of diverse configurations that each correspond to one of the multiple diverse data formats. In addition, the first embodiment of the read detection channel includes a configuration circuit that automatically selects one of the configurations of the data detection circuit in response to a detection of a format of the input data stream. The first embodiment of the read detection channel permits data bits encoded in multiple diverse data formats to be decoded utilizing a single configurable read detection channel. In a second embodiment, the configurable read detection channel includes a tracking threshold circuit that can be configured to generate a threshold output signal in response to an input signal or in response to the input signal and a phase error signal. The second embodiment of the read detection channel further includes a detection circuit, which indicates data bits detected within the input signal in response to the threshold output signal, and at least one phase-locked loop coupled to the detection circuit, which places each detected data bit within one of a plurality of bit cells within an output data stream. The phase-locked loop also generates a phase error signal that can be selectively coupled to the tracking threshold circuit.


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