Fast edge rate signal driver

Abstract

A method for asserting signals onto an output line connected to a passive external pull-up resistor by using a fast edge rate signal driver is provided. The fast edge rate signal driver has first, second and third pull-down predrivers, first, second and third pull-up predrivers, first and second delay elements, and first, second and third output devices, and a PMOS and an NMOS current controller, and each of the output devices has one output terminal coupled to each other forming the output line. The method includes the steps of: (1) applying an input signal to the control terminal of a PMOS current controller for turning ON the PMOS current controller, and to the first pull-down predriver such that a first trigger signal output from the first pull-down predriver applies to the first output device; (2) passing the input signal through the first delay element to generate a first delayed signal which applies to the second pull-down predriver, whereby a second trigger signal output from the second pull-down predriver applies to the second output device; (3) passing the first delayed signal through the second delay element to generate a second delayed signal which applies to the third pull-down predriver, whereby a third trigger signal output from the third pull-down predriver applies to the third output device.