The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 1998
Filed:
May. 20, 1996
Scott Swanstrom, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A computer system comprising an improved DMA controller for performing DMA transfers between a peripheral device and system memory and receiving and servicing interrupts generated by the peripheral device. The system comprises one or more buses for transferring data. A CPU, system memory and a plurality of peripheral devices are interconnected by the buses. Each of the peripheral devices comprises one or more peripheral interrupt request outputs. The system further comprises a programmable DMA controller coupled to the bus which receives the peripheral interrupt request outputs. The DMA controller is configured to perform a DMA transfer on the one or more buses between two or more devices, including the system memory and the plurality of peripheral devices. The CPU programs the DMA controller to start the DMA transfer in response to one of the plurality of peripheral devices generating an interrupt request on its interrupt request output or to start the DMA transfer immediately. The system further comprises a peripheral interrupt controller (PIC) coupled to the CPU. The PIC includes a plurality of PIC interrupt request inputs coupled to the DMA controller. The DMA controller is configured to selectively couple the peripheral interrupt request outputs from the peripheral devices to the plurality of PIC interrupt request inputs of the PIC, to selectively decouple the peripheral interrupt request outputs from the peripheral devices from the plurality of PIC interrupt request inputs of the PIC, and to selectively generate a plurality of interrupt requests on the plurality of PIC interrupt request inputs of the PIC when the peripheral interrupt request outputs from the peripheral devices are decoupled from the plurality of PIC interrupt request inputs. Thus, the DMA controller renders the CPU more responsive to real-time events by servicing a portion of the peripheral interrupts.