The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 1998

Filed:

Dec. 15, 1995
Applicant:
Inventors:

Gary S Muntz, Lexington, MA (US);

Steven E Jacobs, Atkinson, NH (US);

Guy Fedorkow, Watertown, MA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375362 ; 370516 ; 375371 ;
Abstract

A network node destination module for ensuring proper reception and transmission of information over a network having an optional network reference clock including an input stage for receiving the information, a synchronous residual time stamp (SRTS) timing control stage for implementing digital phase comparison techniques utilizing the network reference clock, and a clock generation stage for generating a transmit clock in response to a control value generated by the SRTS timing control stage. The SRTS timing control stage maintains a constant phase offset between the receive clock of the source node and the transmit clock of the destination node. The SRTS timing control stage includes an RTS sample generator for generating a local RTS sample for comparison with the source RTS sample to determine a current phase offset between the source and clocks. The current phase offset is then compared to a target phase offset stored in a phase register to generate a control value. The clock generation stage adjusts the transmit clock in response to a filtered control value and transmits the source data to the destination CPE at the adjusted transmit clock frequency. By maintaining a constant phase offset, the frequencies of the receive clock of the source node and the transmit clock of the destination node are synchronized, thereby providing CBR service. In addition to performing SRTS clock recovery techniques, the destination module may also be configured to perform adaptive clock recovery (ACR) and synchronous network clock (SNC) techniques.


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