The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 1998
Filed:
Feb. 23, 1996
Tomoki Saito, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
An output signal of an opto-electric conversion element 1 is amplified by a differential type pre-amplifier 3 to a predetermined level and input to an ATC circuit 5 as a positive phase signal and an inverted phase signal. These signals are held in respective peak holding circuits 51 and 52 of the ATC circuit 5. The positive phase signal held in the peak holding circuit 51 is added by an adder 57 to the inverted phase signal from the pre-amplifier 3 and the inverted phase signal held in the peak holding circuit 52 is added by an adder 58 to the positive phase signal from the pre-amplifier 3. Resultant sum signals are compared by a comparator 7 with a reference and discriminated as logical '1' and '0'. The positive phase signal from the pre-amplifier 3 is input to a self-reset circuit 9 including a level detector 91, a reset pulse generator and a reset circuit 93. The level detector 91 detects a signal from the pre-amplifier 3. The reset pulse generator 92 generates a reset signal in the form of a single pulse by using an output of the level detector 91. The reset circuit 93 uses the reset signal to discharge a holding capacitor of the peak holding circuit 52. Degradation of duty cycle and of signal amplitude due to offset of an input signal can be minimized.