Low voltage level shifting circuit and low voltage sense amplifier

Abstract

A level shifting circuit includes first and second load, gain and reference transistors. The first and second load transistors each have a source-drain path arranged between Vdd and Vss power supply voltages, and a gate coupled to the Vss power supply voltage. The first and second gain transistors each have a source-drain path arranged between the respective source-drain paths of the first and second load transistors and the Vss power supply voltage, and gates serving as respective differential input nodes. The first and second reference transistors each have a source-drain path arranged between the Vdd and Vss power supply voltages, and a gate coupled to respective first and second nodes serving as respective differential output nodes, the first node connecting the source-drain path of the first load transistor with the source-drain path of the first gain transistor, and the second node connecting the source-drain path of the second load transistor with the source-drain path of the second gain transistor. The level shifting circuit allows for stable and high speed level shifting operation for applications in a sense amplifier, provides a reasonable gain for driving a differential stage or a cascode amplifier stage, delivers a large output differential voltage swing at a supply voltage as low as 1.5 volts, detects small input differential voltages as low as 50 millivolts and is self-biased during changes in voltage, temperature and process conditions.