The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 1998
Filed:
Oct. 04, 1996
Applicant:
Inventors:
Isaak Veytsman, Santa Clara, CA (US);
Jeffrey H Seltzer, Los Gatos, CA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 39 ;
Abstract
An EPLD having improved routing and arithmetic function implementation characteristics. Cascade and carry logic in macrocells allows for rapid implementation of arithmetic functions without unnecessarily tying up device processing and interconnect resources or unnecessarily delaying processing.
Veytsman, Isaak. (1998). Structure and method for arithmetic function implementation in an epld (U.S. Patent No. 5821774). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5821774
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile