Field effect transistors provided with esd circuit

Abstract

A semiconductor device provide with an ESD circuit including three active regions and element isolating regions formed on a semiconductor substrate in such a manner that the active regions are isolated from one another by the element isolating regions, source/drain diffusion regions respectively formed at the active regions, a first interlayer insulating film formed on the semiconductor substrate in such a manner that it covers the active regions and element isolating regions while being provided with first contact holes for exposing the diffusion regions, first lines formed on the first interlayer insulating film in such a manner that they are electrically connected to the diffusion regions via the first contact holes, respectively, a second interlayer insulating film formed over the entire exposed surface of the resulting structure obtained after the formation of the first line in such a manner that it has second contact holes for exposing the first line disposed over a central one of the active regions, and a second line formed on the second interlayer insulating film in such a manner that it is electrically connected to the exposed first line via the second contact holes.