The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 1998
Filed:
Oct. 08, 1996
Applicant:
Inventor:
Joseph Cesana, Palo Alto, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395395 ;
Abstract
An instruction swap is implemented in a dual pipelined microprocessor to make instruction flow smoother upon resource or structural conflicts in executing an instruction. Instructions are accessed in an even and odd pair with an even instruction proceeding an odd instruction. The accessed instructions are stored in Read/Decode registers for decoding and execution. The even and odd instructions are swapped in the registers and in execution when the preceding even instruction encounters an execution conflict or a branch.