The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1998

Filed:

Aug. 22, 1996
Applicant:
Inventor:

David Edgar Castle, Poway, CA (US);

Assignee:

Unisys Corporation, Blue Bell, PA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375354 ; 327160 ;
Abstract

A pulse synchronizing module includes: a) a pair of input leads which respectively receive a clock signal and digital input pulses that are asynchronous to the clock signal; b) a first counter circuit which is triggered by rising edge transitions in the input pulses, and a second counter circuit which is triggered by falling edge transitions in the input pulses; c) first and second registers which, in synchronization with the clock signal, sample respective counts in the first and second counter circuits; and d) an output circuit, coupled to the first and second registers. This output circuit generates, the rising edge of an output pulse, in synchronization with the clock signal, when the count sample in the first register differs from the number of rising edges which the output circuit previously generated; and it generates the falling edge of the output pulse, in synchronization with the clock signal, when the count sample in the second register differs from the number of falling edges previously generated. With this pulse synchronizing module, the samples in the first and second registers can contain errors if the samples are taken while the counters are triggered; and despite these errors, the number of output pulses which are generated will still equal the number of input pulses.


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