The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1998

Filed:

Apr. 03, 1997
Applicant:
Inventors:

Sampei Miyamoto, Tokyo, JP;

Tamihiro Ishimura, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523003 ; 36523006 ; 36518905 ; 36523008 ;
Abstract

A semiconductor memory device according to the present invention comprise a plurality of arrays each supplied with a common column address signal. In an selected array, the potential of a data line is set to a potential corresponding to a potential supplied to a corresponding bit line in response to the potential of the bit line, the potential of the corresponding column address signal and the potential of a terminal. In non-selected array other than the selected array at this time, since the potential of a terminal in the non-selected array is set to a potential different from that of the terminal in the selected array, the potential of the data line remains unchanged irrespective of the column address signal.


Find Patent Forward Citations

Miyamoto, Sampei. (1998). Semiconductor memory device (U.S. Patent No. 5818787). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5818787

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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