The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 1998
Filed:
Feb. 27, 1997
Ridha M Hamza, Minneapolis, MN (US);
Honeywell, Inc., Minneapolis, MN (US);
Abstract
A delay locked loop, temperature independent, wide range frequency clock multiplier that outputs a clock signal that has a frequency that is a multiple of the frequency of the input clock signal. The multiplier does not use any phase-locked circuitry. It has adjustable delay lines or cells that are cascaded and have outputs to a multiple input exclusive OR gate. The exclusive OR gate outputs the multiplied frequency signal. A delay controller outputs a signal to each of the delay lines or cells for setting the amount of delay in each line or cell. A delay monitor has inputs from the exclusive OR gate output and the delay controller output. The delay monitor outputs signals to the delay controller which has a phase differentiator. The delay controller output is such to maintain a particular duty cycle on the waveform of the multiplied frequency signal output from the exclusive OR gate.